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** 6 MOSFETs (3 n-type + 3 p-type) | ** 6 MOSFETs (3 n-type + 3 p-type) | ||
** 3 Voltage sources | ** 3 Voltage sources | ||
Below we show three methods for constructing the circuit data structure | |||
__TOC__ | |||
{{Code|Load the AND circuit structure parsing a .spc file |<syntaxhighlight lang="octave" style="font-size:13px"> | |||
outstruct = prs_spice ("and"); | |||
</syntaxhighlight> | |||
}} | |||
{{Code|Load the AND circuit structure parsing an IFF netlist |<syntaxhighlight lang="octave" style="font-size:13px"> | |||
outstruct = prs_iff ("and"); | |||
</syntaxhighlight> | |||
}} | |||
{{Code|Run the AND gate simulation |<syntaxhighlight lang="octave" style="font-size:13px"> | |||
x = [.5 .5 .33 .66 .5 1 0 0 1 ]'; | |||
t = linspace (0, .5, 100); | |||
pltvars = {"Va", "Vb", "Va_and_b"}; | |||
dmp = .2; | |||
tol = 1e-15; | |||
maxit = 100; | |||
out = tst_backward_euler (outstruct, x, t, tol, maxit, pltvars); | |||
</syntaxhighlight> | |||
}} | |||
==== Using an IFF netlist ==== | ==== Using an IFF netlist ==== |
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