349
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Ocs package: Difference between revisions
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→Build the AND gate circuit structure parsing a .spc file
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V1 Va 0 SIN(0.5 0.5 1 0 0) | V1 Va 0 SIN(0.5 0.5 1 0 0) | ||
V2 Vb 0 SIN(0.5 0.5 2 0.25 0) | V2 Vb 0 SIN(0.5 0.5 2 0.25 0) | ||
V3 Vdd 0 1 | V3 Vdd 0 1 | ||
.END | .END | ||