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Ocs package: Difference between revisions
→Build the AND gate circuit structure parsing a .spc file
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M4 Va Vdd 4 Vdd mypmos | M4 Va Vdd 4 Vdd mypmos | ||
M5 Vb Vdd 4 Vdd mypmos | M5 Vb Vdd 4 Vdd mypmos | ||
* pside of the inverter | |||
M6 4 Vdd Va_and_b Vdd mypmos | M6 4 Vdd Va_and_b Vdd mypmos | ||