Ocs package

OCS : Octave Circuit Simulator

Tutorials

A CMOS AND GATE

Schematic for a CMOS AND gate

Here we show how to set up the simulation of the CMOS AND gate in the figure. The circuit has

• 9 Elements
  • 6 MOSFETs (3 n-type + 3 p-type)
  • 3 Voltage sources

Below we show three methods for constructing the circuit data structure

• using an Octave script
• parsing a SPICE netlist
• parsing an IFF netlist

Once the circuit data structure is loaded the simulation can be started by the following commands

Code: Run the AND gate simulation

x = [.5 .5 .33 .66 .5 1 0 0 1 ]'; t = linspace (0, .5, 100); pltvars = {"Va", "Vb", "Va_and_b"}; dmp = .2; tol = 1e-15; maxit = 100; out = tst_backward_euler (outstruct, x, t, tol, maxit, pltvars);

Click on the figure to the right to see the simulation results

Result of the CMOS AND gate switching simulation

Build the AND gate circuit structure parsing an IFF netlist

Code: Load the AND circuit structure parsing an IFF netlist

outstruct = prs_iff ("and");

Code: IFF netlist for the AND gate (.cir file)

% 0.1b1 % A Simple CMOS AND GATE % % N-Mosfets % There are 3 N-Mosfets Mnmosfet simple 4 3 3 3 k Vth rd 1e-4 0.1 1e7 1e-4 0.1 1e7 1e-4 0.1 1e7 1 3 4 0 2 0 3 0 4 0 5 0 % % P-Mosfets Mpmosfet simple 4 3 3 3 k Vth rd -1e-4 -0.1 1e7 -1e-4 -0.1 1e7 -1e-4 -0.1 1e7 1 6 4 6 2 6 4 6 4 6 5 6 % % Input voltage sources Mvoltagesources sinwave 2 4 2 4 Ampl f delay shift 0.5 1 0.0 0.5 0.5 2 0.25 0.5 1 0 2 0 END % % Power supply Mvoltagesources DC 2 1 1 1 V 1 6 0 END

Code: IFF netlist for the AND gate (.nms file)

% 0.1b1 1 Va 2 Vb 5 Va_and_b 6 Vdd 7 I1 8 I2 9 I3

Code: Model evaluator file for simple MOSFET models

function [a,b,c] = Mnmosfet (string, parameters, parameternames, extvar, intvar, t) switch string case 'simple', rd = 1e6; for ii=1:length(parameternames) eval([parameternames{ii} "=",... num2str(parameters(ii)) " ;"]) endfor vg = extvar(1); vs = extvar(2); vd = extvar(3); vb = extvar(4); vgs = vg-vs; vds = vd-vs; if (vgs < Vth) gm = 0; gd = 1/rd; id = vds*gd; elseif ((vgs-Vth)>=(vds))&(vds>=0) id = k*((vgs-Vth)*vds-(vds^2)/2)+vds/rd; gm = k*vds; gd = k*(vgs-Vth-vds)+1/rd; elseif ((vgs-Vth)>=(vds))&(vds<0) gm = 0; gd = 1/rd; id = vds*gd; else # (i.e. if 0 <= vgs-vth <= vds) id = k*(vgs-Vth)^2/2+vds/rd; gm = k*(vgs-Vth); gd = 1/rd; endif a = zeros(4); b = [ 0 0 0 0; -gm (gm+gd) -gd 0; gm -(gm+gd) gd 0; 0 0 0 0]; c = [0 -id id 0]'; break; otherwise error(["Mnmosfet: unknown option " string]); endswitch endfunction

Build the AND gate circuit structure parsing a .spc file

Code: Load the AND circuit structure parsing a .spc file

outstruct = prs_spice ("and");

Code: Load the AND circuit structure parsing a .spc file

outstruct = prs_spice ("and");