Ocs package: Difference between revisions
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== Tutorials == | == Tutorials == | ||
[[File: | [[File:AND_BW.png | Circuit Schematic]] | ||
{{Code|IFF netlist for the AND gate (.cir file)|<syntaxhighlight lang="text" style="font-size:13px"> | {{Code|IFF netlist for the AND gate (.cir file)|<syntaxhighlight lang="text" style="font-size:13px"> |
Revision as of 05:36, 22 September 2015
OCS : Octave Circuit Simulator
History and Motivation
Problem Formulation
Data Structure
File Formats
Tutorials
Code: IFF netlist for the AND gate (.cir file) |
% 0.1b1
% A Simple CMOS AND GATE
%
% N-Mosfets
% There are 3 N-Mosfets
Mnmosfet simple 4 3
3 3
k Vth rd
1e-4 0.1 1e7
1e-4 0.1 1e7
1e-4 0.1 1e7
1 3 4 0
2 0 3 0
4 0 5 0
%
% P-Mosfets
Mpmosfet simple 4 3
3 3
k Vth rd
-1e-4 -0.1 1e7
-1e-4 -0.1 1e7
-1e-4 -0.1 1e7
1 6 4 6
2 6 4 6
4 6 5 6
%
% Input voltage sources
Mvoltagesources sinwave 2 4
2 4
Ampl f delay shift
0.5 1 0.0 0.5
0.5 2 0.25 0.5
1 0
2 0
END
%
% Power supply
Mvoltagesources DC 2 1
1 1
V
1
6 0
END
|
Code: IFF netlist for the AND gate (.nms file) |
% 0.1b1
1 Va
2 Vb
5 Va_and_b
6 Vdd
7 I1
8 I2
9 I3
|
Code: Model evaluator file for simple MOSFET models |
function [a,b,c] = Mnmosfet (string, parameters, parameternames, extvar, intvar, t)
switch string
case 'simple',
rd = 1e6;
for ii=1:length(parameternames)
eval([parameternames{ii} "=",...
num2str(parameters(ii)) " ;"])
endfor
vg = extvar(1);
vs = extvar(2);
vd = extvar(3);
vb = extvar(4);
vgs = vg-vs;
vds = vd-vs;
if (vgs < Vth)
gm = 0;
gd = 1/rd;
id = vds*gd;
elseif ((vgs-Vth)>=(vds))&(vds>=0)
id = k*((vgs-Vth)*vds-(vds^2)/2)+vds/rd;
gm = k*vds;
gd = k*(vgs-Vth-vds)+1/rd;
elseif ((vgs-Vth)>=(vds))&(vds<0)
gm = 0;
gd = 1/rd;
id = vds*gd;
else # (i.e. if 0 <= vgs-vth <= vds)
id = k*(vgs-Vth)^2/2+vds/rd;
gm = k*(vgs-Vth);
gd = 1/rd;
endif
a = zeros(4);
b = [ 0 0 0 0;
-gm (gm+gd) -gd 0;
gm -(gm+gd) gd 0;
0 0 0 0];
c = [0 -id id 0]';
break;
otherwise
error(["Mnmosfet: unknown option " string]);
endswitch
endfunction
|